Shanghai Accelerates the Localization Deployment of Intelligent Computing Chips

Recently, the Shanghai Municipal Administration of Communications and 11 other departments jointly issued the "Implementation Plan for the High-Quality Development of Shanghai's Intelligent Computing Infrastructure” proposing the autonomous and controllable development of intelligent computing elements. 

By 2025, the scale of intelligent computing power in Shanghai will exceed 30EFlops, accounting for over 50% of the total computing power. The one-way network latency between computing power network nodes should be controlled within 1 millisecond. The advanced storage capacity in the intelligent computing center accounts for more than 50%. 

The Action Plan also proposes to accelerate the localization and deployment of intelligent computing chips to meet the needs of multimodal large models and large-scale, high-speed distributed computing, accelerate the research and development process of ARM, RISC-V, X86 and other infrastructure, as well as domestic heterogeneous intelligent computing power such as GPU, ASIC, FPGA, etc., and achieve comprehensive deployment of high-end training computing power, autonomous edge decision-making computing power, and efficient terminal execution computing power in intelligent computing centers. 

Actively exploring innovative architecture routes such as reconfigurable, integrated storage and computing, brain like computing, Chiplet, DSV, etc. 

Promote the comprehensive compatibility of intelligent computing chips with domestic training frameworks, further enhance the computing power scheduling ability of intelligent computing centers, and promote the high-quality autonomous control of intelligent computing chip software and hardware.